Check out this article in Fedora Magazine about our work with this emerging open-hardware CPU architecture!
19 Likes
Thanks 
SĂşper!!
Thanks for sharing,
Isaac
1 Like
Exciting to see this!
I think there’s a small editing mistake here:
RISC-V was developed at the University of California, Berkeley, in 2010, RISC-V. It was created…
[Edit: thanks for fixing it. 
]
Looks great.
I look forward to building a computer using a RISC-V board in future.
2 Likes
Pretty cool!
My few cents: afaik RISC-V is so barebones that many vendors kinda build their own system? And compared to ARM, RISC-V lacks a lot of security features.
For example ARM-v9 with MTE (memory tagging extension) is really nice to spot memory corruption bugs, and software like hardened-malloc supports it
I’m looking forward to seeing a board with lots of cpu cores(not just 4), lots of fully supported on-board gpu/npu without any necessity for pcie gpu, BUT I do hope we still have pcie ports on the board like the usual ATX desktop computer. Mini-pc form-factors seem to be cool, but they sure don’t have expandability and they still cost expensive so it still makes more sense just to buy ATX desktop computer form-factor stuff. Laptops are practical, but I still feel un-empowered because of constrained/limited cpu-core count and RAM.
It has been said on the matrix channel it takes days if not weeks to build anything natively on any of these boards. I don’t feel empowered and I lack patience. Don’t the rest of you feel the same? Why didn’t they consider this before selling this hardware and sell hardware that performs equally well if not better than intel/amd/nvidia for the next couple of years to make it a more attractive purchase. My money has to at the very least get me something equally empowering to proprietary hardware in order for it to be a true alternative.
Please see this as a constructive criticism. I really want to buy open-hardware. I bought a few arm-sbc’s and the starfive vf2 all claiming full linux support, but their internal gpu’s ALL of them were not supported well at purchase time and were much slower than my desktop at the time. I was hoping to replace my desktop with one of those, but unfortunately it hasn’t happened yet. If the market is to grow, the FULL SUPPORT needs to happen, EQUALLY EMPOWERING CAPABILITIES need to be offered in the usual desktop/laptop/mini-pc/HOME-ALL-FLASH-NAS form-factors. Thank you for listening.
It definitely is longer than x86/arm/friends–but it’s not days to build everything. There are some packages which take a long time: gcc and llvm–compiler toolchain stuff, but we can build a kernel in ~5 hours on a p550, for example. Most packages do not take very long to build, even if we average in the very long ones like gcc. Again: yes, longer than mainstream architectures, but especially the P550 has made dramatic steps towards tolerable compilation times.
As for why didn’t “they” wait until it’s faster to start selling them–well, people aren’t going to wait forever, and interest isn’t going to come from nowhere.
RV is still in its relative infancy, but the trajectory is steep. Right now it’s still for early adopters, and expectations must be tempered.
2 Likes
Pretty cool!
My few cents: afaik RISC-V is so barebones that many vendors kinda build their own system?
It depends on how you define “so barebones”. There are a few major
vendors who are actively publishing some development boards based on
RISC-V “profiles” that are frozen (or “ratified”). A “profile” is a
collection of extensions on top of the default RISC-V extension. Most
recently “RVA23” profile was ratified[1].
And compared to ARM, RISC-V lacks a lot of security features.
Arm architecture has been around for ~41 years, while RISC-V for about
~14 years. RISC-V development is still very active, and several
upstream workgroups are chipping away at it.
For example ARM-v9 with MTE (memory tagging extension) is really nice to spot memory corruption bugs, and software like hardened-malloc supports it
Good news: an upstream workgroup has been working[2] on memory tagging
(MTE). In that thread, see the section “Memory tagging on RISC-V”
for links to a few design proposals. If you have expertise in this area
and want to shape the feature’s development, you might want to subscribe
to that list.
[1] RISC-V Announces Ratification of the RVA23 Profile Standard – RISC-V International
[2] https://lists.riscv.org/g/tech-j-ext/topic/memory_tagging_on_risc_v/101105860
1 Like
@boredsquirrel On memory tagging, an upstream RISC-V developer pointed me to the “run-time integrity SIG”[1]. I also noticed there’s a memory-tagging SIG on its own. The archives are open.
[1] sig-runtime-integrity@lists.riscv.org | Home
[2] tech-memory-tagging@lists.riscv.org | Home
1 Like